SC486
POWER MANAGEMENT
Design Procedure - VDDQ Controller
Prior to designing an output and making component
selections, it is necessary to determine the input voltage
range and the output voltage specifications. For purposes
of demonstrating the procedure an 8A VDDQ output
being used to power VTT at +/-2A for a total IDDQ of
10A will be designed.
The maximum input voltage (V ) is determined by
BAT(MAX)
the highest AC adaptor voltage. The minimum input
voltage (VBAT(MIN)) is determined by the lowest battery
voltage after accounting for voltage drops due to
connectors, fuses and battery selector switches. For the
purposes of this design example we will use a VBAT range
of 9V to 19.2V.
and
( ) f = SW _ VBAT(MAX)
VOUT
V • t BAT(MAX ) ON _ VBAT(MAX )
Hz
tON is generated by a one-shot comparator that samples
VBAT via RtON, converting this to a current. This current is
used to charge an internal 3.3pF capacitor to VOUT. The
equations above reflect this along with any internal
components or delays that influence tON. For our DDR2
VDDQ example we select RtON = 715kΩ:
tON_VBAT(MIN) = 546ns and tON_VBAT(MAX) = 283ns
fSW_VBAT(MIN) = 366kHz and fSW_VBAT(MAX) = 332kHz
Four parameters are needed for the output:
1) nominal output voltage, VOUT (for DDR2 this is 1.8V)
2) static (or DC) tolerance, TOLST (we will use +/-4% for
this design )
3) transient tolerance, TOL and size of transient (we will
TR
use +/-100mV for this design).
4) maximum output current, IOUT (we are designing for
10A)
Now that we know tON we can calculate suitable values
for the inductor. To do this we select an acceptable
inductor ripple current. The calculations below assume
50% of IOUT which will give us a starting place.
( ) ( ) L = VBAT(MIN)
V − V BAT(MIN)
OUT
•
t ON _ VBAT(MIN)
0.5 • IOUT
H
Switching frequency determines the trade-off between
size and efficiency. Increased frequency increases the
switching losses in the MOSFETs, since losses are a
function of VIN2. Knowing the maximum input voltage and
budget for MOSFET switches usually dictates where the
design ends up. The default RtON value of 715kΩ is
suggested as a starting point, but it is not set in stone.
The first thing to do is to calculate the on-time, t , at
ON
VBAT(MIN) and V , BAT(MAX) since this depends only upon VBAT,
VOUT and RtON.
( ) tON_ VBAT(MIN) = 3.3 • 10−12 •
RtON + 37 • 103
•
VOUT
VBAT(MIN)
+
50
• 10−9 s
and
( ) tON_ VBAT(MAX) = 3.3 • 10−12 •
RtON + 37 • 103
•
VOUT
VBAT ( MAX )
+
50
• 10−9 s
From these values of tON we can calculate the nominal
switching frequency as follows:
and
( ) ( ) L = VBAT(MAX)
V − V BAT(MAX)
OUT
•
t ON _ VBAT(MAX )
0.5 • IOUT
H
For our DDR2 VDDQ example:
LVBAT(MIN) = 0.8µH and LVBAT(MAX) = 1.0µH
We will select an inductor value of 1.5µH to reduce the
ripple current, which can be calculated as follows:
I = (V − V )• t L A RIPPLE _ VBAT(MIN)
BAT ( MIN )
OUT
ON _ VBAT(MIN)
P−P
and
I = (V − V )• t L A RIPPLE _ VBAT(MAX)
BAT ( MAX )
OUT
ON _ VBAT(MAX )
P−P
( ) f = SW _ VBAT(MIN)
VOUT
V • t BAT(MIN) ON _ VBAT(MIN)
Hz
2006 Semtech Corp.
15
www.semtech.com