SC486
POWER MANAGEMENT
Layout Guidelines (Cont.)
Next, looking at the switcher power section, the schematic in Figure 10 below shows the power section for VDDQ:
Q1 IRF7811AV
1
2
3
4
S
S
S
G
D
D
D
D
8
7
6
5
VBAT
C5
2n2/ 50V
C6
0u1/ 25V
C7
10u/ 25V
C8
10u/ 25V
FDS6676S Q2
8
7
6
5
D
D
D
D
S
S
S
G
1
2
3
4
L1 1u5
+ C13
220u/15m
VDDQ
+ C14
220u/15m
Figure 10: VDDQ Power Section and Input Loop
The highest di/dts occur in the input loop (highlighted in red) and thus this should be kept as small as possible. The
input capacitors should be placed with the highest frequency capacitors closest to the loop to reduce EMI. Use large
copper pours to minimize losses and parasitics. See Figure 11 below for an example.
2006 Semtech Corp.
Figure 11: Example VDDQ Power Section Layout
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