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SC5010 View Datasheet(PDF) - Semtech Corporation

Part Name
Description
MFG CO.
'SC5010' PDF : 36 Pages View PDF
SC5010
Applications Information (continued)
High Output Voltage Configuration
If high output voltage application is required, an addi-
tional external cascode MOSFET can be added on each IO
pin to meet such requirement, please refer to figure 4 for
reference.
In this case, the upper limit on the output voltage is mainly
determined by the rating of the external MOSFET, heat
dissipation, etc.
PCB Layout Considerations
The placements of the power components outside the
SC5010 should follow the layout guidelines of a general
boost converter. The Detailed Application Circuit is used
as an example.
1. Capacitor (C2) should be placed as close as possible to
the VCC and AGND to achieve the best performance.
2. Capacitor (C1) is the input power filtering capacitor
for the boost, it needs to be tied to PGND.
3. The converter power train inductor (L1) is the boost
converter input inductor. Use wide and short traces
connecting these components.
4. The output rectifying diode (D1) uses a Schottky
diode for fast reverse recovery. Transistor (Q1) is the
external switch. Resistor (R9) is the switch current
sensing resistor. To minimize switching noise for the
boost converter, the output capacitor (C6) should be
placed such that the loop formed by Q1, D1, C6 and
R9, is minimized. The output of the boost converter is
used to power up the LEDs. Use wide and short trace
connecting Pin DRVN and the gate of Q1. The GNDs
Vin
(5-27V)
PGND
Vcc (5V)
AGND
C1
R2
C2
2 . 2 μF
R1
Q2
L1
C7
C8
D1
L2
Q1
R9
0.1
U1 28 27 26 25 24 23 22
R11
C6
R10
R3
R4
R5
C3
1 μF
R6
R15
1
VCC
2 EN
3 UVLO
4
SCP
5 BG
6
FSET
7
AGND
S C5010
IO2 21
IO3 20
IO4 19
18
IO5
IO6 17
IO7 16
15
IO8
8
R7
C4
C5
9 10 11 12 13 14
THP
PAD
R8
SYNC SCL SDA
FLT PWMI
Figure 3 — SEPIC Configuration
Vout
22
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