SL20T0081 View Datasheet(PDF) - System Logic Semiconductor
Part Name
Description
MFG CO.
'SL20T0081' PDF : 56 Pages View PDF
SLS System Logic Semiconductor
SL20T0081
Oscillator
This is completely on-chip oscillator and its frequency is nearly independent of VDD. This oscillator signal is used in
the voltage converter and display timing generation circuit. The oscillator circuit is only enabled when MS=“H’ and
CLS=“H”. When on-chip oscillator is not used, CLS pin must be “L”condition. In this time, external clock must be input
from CL pin.
Display Timing Generator Circuit
This circuit generates some signals to be used for displaying LCD. The display clock, CL generated by oscillation
clock, generates a clock to the line counter and a latch signal to the display data latch. The line address of on-chip
RAM is generated in synchronization with the display clock (CL) and the 132-bit display data is latched by the display
data latch circuit in synchronization with display clock. The display data which is read to the LCD driver is completely
independent of the access to the display data RAM from the microprocessor. The LCD AC signal, SYNC is generated
from the display clock. 2-frame AC driver waveforms with internal timing signal are shown in figure 8.
In a multiple chip configuration, the slave chip requires the SYNC, CL and DISP signals from the master. Table 6
shows the SYNC, CL, and DISP status.
Table 6. Master and Slave Timing Signal Status
Operation mode
Oscillator
Master
ON(internal clock used)
OFF(external clock used)
Slave
-
SYNC
Output
Output
Input
CL
Output
Input
Input
DISP
Output
Output
Input
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