SM5842APT View Datasheet(PDF) - Nippon Precision Circuits
Part Name
Description
MFG CO.
'SM5842APT' PDF : 23 Pages View PDF
SM5842AP/APT
TIMING DIAGRAMS
Input Timing Examples (DIN, BCKI, LRCI)
1 / fs
Lch DATA
(MSB)
(LSB)
DI
12
14 15 16
Rch DATA
(MSB)
(LSB)
12
14 15 16
BCKI
LRCI
INF1N = LOW, IW1N = IW2N = HIGH
Figure 4. LR alternating, trailing data, 16-bit input
1 / fs
Lch DATA
(MSB)
(LSB)
DIL
123
23 24
1
Rch DATA
(MSB)
(LSB)
DIR
123
23 24
BCKI
LRCI
INF1N HIGH, INF2N = LOW.
Data following LSB is ignored. Requires minimum 24 BCKI clock pulses.
Figure 5. LR alternating, leading data, 24-bit input
1 / fs
(MSB)
Lch DATA
DIL
1 2 34 56
(MSB)
Rch DATA
DIR
1 2 34 56
(LSB)
23 24
1
(LSB)
23 24
1
BCKI
LRCI
INF1N = INF2N = HIGH.
Data following LSB is ignored. Requires minimum 24 BCKI clock pulses.
Figure 6. LR simultaneous, leading data, 20-bit input
NIPPON PRECISION CIRCUITS—17
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