FlashFlex51 MCU
SST89E564RD / SST89V564RD / SST89E554RC / SST89V554RC
Preliminary Specifications
ALE
PSEN#
PORT 0
PORT 2
TLHLL
TAVLL
TLLPL
TLLAX
A7 - A0
TLLIV
TPLIV
TPLPH
TPLAZ TPXIZ
TPXIX
INSTR IN
TAVIV
A15 - A8
A7 - A0
A15 - A8
555 ILL F27.0
FIGURE 11-6: EXTERNAL PROGRAM MEMORY READ CYCLE
ALE
PSEN#
RD#
PORT 0
PORT 2
TLHLL
TAVLL
TLLDV
TLLWL
TLLAX
TRLAZ
TRLRH
TRLDV
A7-A0 FROM RI or DPL
DATA IN
TAVWL
TAVDV
P2[7:0] or A15-A8 FROM DPH
TWHLH
TRHDZ
TRHDX
A7-A0 FROM PCL
INSTR IN
A15-A8 FROM PCH
555 ILL F28.0
FIGURE 11-7: EXTERNAL DATA MEMORY READ CYCLE
©2001 Silicon Storage Technology, Inc.
57
S71207-00-000 9/01 555