ST10F168-Q3 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST10F168-Q3' PDF : 74 Pages View PDF
ST10F168
The state of this latch may be used to clock timer
T5, or it may be output on a port pin (T6OUT).
The overflows / underflows of timer T6 can also be
used to clock the CAPCOM timers T0 or T1, and
to cause a reload from the CAPREL register.
The CAPREL register can capture the contents of
T5 from an external signal transition on the
corresponding port pin (CAPIN), and T5 may be
optionally cleared after the capture procedure.
This allows absolute time differences to be
measured or pulse multiplication to be performed
without software overhead.
The capture trigger (timer T5 to CAPREL) may
also be generated on transitions of GPT1 timer T3
inputs T3IN and / or T3EUD. This is useful when
T3 operates in Incremental Interface Mode.
Table 15 GPT2 timer input frequencies, resolution
and periods lists the timer input frequencies, reso-
lution and periods for each pre-scaler option at
25MHz CPU clock. This also applies to the Gated
Timer Mode of T6 and to the auxiliary timer T5 in
Timer and Gated Timer Mode.
Table 15 : GPT2 timer input frequencies, resolution and periods
fCPU = 25MHz
000b
001b
Timer Input Selection T5I / T6I
010b
011b
100b
101b
110b
111b
Pre-scaler Factor
Input Frequency
Resolution
Period
4
8
16
32
64
128
256
512
6.25MHz 3.125MHz 1.563MHz 781.3KHz 390KHz 195.3KHz 97.66KHz 48.83KHz
160ns 320ns 640ns 1.28µs 2.56µs 5.12µs 10.24µs 20.48µs
10.49ms 21.0ms 41.9ms 83.9ms 167ms 336ms 671ms 1.34s
Figure 6 : Block Diagram of GPT1
T2EUD
CPU Clock 2n n=3...10
T2IN
T2
Mode
Control
U/D
GPT1 Timer T2
Reload
Capture
Interrupt
Request
CPU Clock 2n n=3...10
T3IN
T3EUD
T3
Mode
Control
T4IN
CPU Clock 2n n=3...10
T4
Mode
Control
T4EUD
GPT1 Timer T3
U/D
Capture
Reload
GPT1 Timer T4
U/D
T3OUT
T3OTL
Interrupt
Request
Interrupt
Request
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