ST18AU1_DS View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST18AU1_DS' PDF : 87 Pages View PDF
18.3.8 I2C Host interface
CLK0
INCYCLE
SCL (in)
HDA (in)
2x T0
t77
t76
HCL (in)
t78
HDA (out)
HDA (out)
t79
HCL (in)
t80
t81
ST18-AU1
No
t76
t77
t78*
t79**
t80
t81
PARAMETER
HDA (in) setup time vs SCLK
HDA (in) hold time vs SCLK
HDA (out) low delay min
HDA (out) low delay max
HDA (out) lo to Hi Z delay min
HDA (out) lo to Hi Z delay max
START Condition setup
STOP Condition setup
* = External R load to Vdd =
** Rise time defined by External Rload
Min (ns)
Typ (ns)
2xT0 + 1.1ns
0
2xT0 + 6.45ns
4xT0 + 6.45ns
TBD
TBD
TBD
TBD
Max (ns)
79/87
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