ST1S10 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST1S10' PDF : 26 Pages View PDF
Layout considerations
6
Layout considerations
ST1S10
Layout is an important step in design for all switching power supplies.
High-speed operation (900 kHz) of the ST1S10 device demands careful attention to PCB
layout. Care must be taken in board layout to get device performance, otherwise the
regulator could show poor line and load regulation, stability issues as well as EMI problems.
It is critical to provide a low inductance, impedance ground path. Therefore, use wide and
short traces for the main current paths.
The input capacitor must be placed as close as possible to the IC pins as well as the
inductor and output capacitor. Use a common ground node for power ground and a different
one for control ground (AGND) to minimize the effects of ground noise. Connect these
ground nodes together underneath the device and make sure that small signal components
returning to the AGND pin and do not share the high current path of CIN and COUT.
The feedback voltage sense line (VFB) should be connected right to the output capacitor and
routed away from noisy components and traces (e.g., SW line). Its trace should be
minimized and shielded by a guard-ring connected to the ground.
Figure 6. PCB layout suggestion
VFB guard-ring
CN1=Input power supply
CN2=Enable/Disable
CN3=Input sync.
CN4=VOUT
Input capacitor C1 must be placed
as close as possible to the IC
pins as well as the inductor L1
and output capacitor C2
Vias from thermal pad
to bottom layer
47mm
14/26
Share Link: 
