ST20-C1 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST20-C1' PDF : 205 Pages View PDF
bitld
load bit
Code: 22 F3
Description: Get a bit of Breg. The bit number is given by Areg. Breg is rotated into
Creg, to preserve the value rather than the bit number.
Definition:
Areg′ ← (Breg >> Areg) ∧ 1
Breg′ ← Creg
Creg′ ← Breg
Status Register:
No effect
Comments:
Secondary instruction.
Areg must be in the range 0..31.
See also: bitst bitmask
section 4.8.
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