ST40RA View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

ST40RA

32-bit Embedded SuperH Device

STMicroelectronics 

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6 Clock generation

6.3.1 CLOCKGENA_2x PCI (PCI_DIV_BYPASS = 0)

Reset mode

MODE[4:3]

Reset value

PLL2 frequency

00

0x7938 B012

528 MHz

01

0x7938 B012

528 MHz

10

0x7938 B012

528 MHz

11

0x0938 B012

0 MHz

Table 16: CLOCKGENA PLL2 reset values (PCI_DIV_BYPASS = 0)

6.3.2 Division ratios on CLOCKGENA_2x

Mode

MODE[4:3]

Divide ratio selected PCI_BUS_CLK freq.

00

8

66 MHz

01

16

33 MHz

10

21

25.14 MHz

11

-

0 MHz

Table 17: CLOCKGENA_PLL2 PCI reset division ratios.

ST40RA

35/94 STMicroelectronics

ADCS 7260755H

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