ST40RA View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

ST40RA

32-bit Embedded SuperH Device

STMicroelectronics 

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6 Clock generation

ST40RA

6.6.1 CLOCKGENB.CLK_SELCR register

CLOCKGENB.CLK_SELCR

Clock source selection

The CLKGENB.CLK_SELCR register controls the selection of clock domain clock sources

0 LMI_SEL

Reserved

Reset state: 0

1 PCI_SEL

Select PCI clock

0: PCI_SS_CLK from CLOCKGENA_12

1: PCI_SS_CLK from CLOCKGENA_13

Reset state: 0

[2:3] EMI_SEL

Select EMI clock

00: EMI_SS_CLK from CLOCKGENA_12

01: EMI_SS_CLK from CLOCKGENA_13

10: EMI_SS_CLK from CLOCKGENA_14

11: EMI_SS_CLK from CLOCKGENB_12

Reset state: 00

[4:7] EXT_CLK_SEL

Not used

Reset state: 0000

[8:31] Reserved

Reset state: 0

0x0068

RW

RW

RW

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ADCS 7260755H

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