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ST486SMM View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
ST486SMM
ST-Microelectronics
STMicroelectronics ST-Microelectronics
'ST486SMM' PDF : 34 Pages View PDF
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ST486DX - SMM OVERVIEW
1.3 Typical SMM Routines
A typical SMM routine is illustrated in the flowchart shown in Figure 1-1. Upon entry to SMM,
the CPU registers that will be used by the SMM routine, must be saved. The SMM environment is
initialized by setting up an Interrupt Descriptor Table, initializing segment limits and setting up a
stack. If the SMI was a result of an I/O bus cycle, the SMM routine can monitor peripheral activ-
ity, shadow read-only ports ,and/or emulate peripherals in software. If a peripheral was powered
down, the SMM routine can power up a peripheral and reissue the I/O instruction. If the SMI was
not caused by an I/O bus cycle, non-trap SMI functions can be serviced. If the instruction execut-
ing, when an SMI occurred, was a HLT instruction, the HLT instruction it should be restarted when
the SMM routine is complete. Before normal operation is resumed, any CPU registers modified
during the SMM routine must be restored to their previous state.
SMM Entry
Save State
Initialize SMM
Environment
Service
Non-Trap SMI
N I/O Y
Trap?
HALT? Y
N
Decrement
EIP
Res t o r e
State
Resume
SMM Exit
Device Y
OFF?
N
Shadow
or Emulate
Service
Trap SMI
Modify State
For I/O Restart
1727400
Figure 1 - 1. Typical SMM Routine
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