ST6285B View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST6285B' PDF : 78 Pages View PDF
ST62T85B/E85B
2 CENTRAL PROCESSING UNIT
2.1 INTRODUCTION
The CPU Core of ST6 devices is independent of the Indirect Registers (X, Y). These two indirect reg-
I/O or Memory configuration. As such, it may be isters are used as pointers to memory locations in
thought of as an independent central processor Data space. They are used in the register-indirect
communicating with on-chip I/O, Memory and Pe- addressing mode. These registers can be ad-
ripherals via internal address, data, and control dressed in the data space as RAM locations at ad-
buses. In-core communication is arranged as dresses 80h (X) and 81h (Y). They can also be ac-
shown in Figure 6; the controller being externally cessed with the direct, short direct, or bit direct ad-
linked to both the Reset and Oscillator circuits, dressing modes. Accordingly, the ST6 instruction
while the core is linked to the dedicated on-chip pe- set can use the indirect registers as any other reg-
ripherals via the serial data bus and indirectly, for ister of the data space.
interrupt purposes, through the control registers.
Short Direct Registers (V, W). These two regis-
2.2 CPU REGISTERS
ters are used to save a byte in short direct ad-
dressing mode. They can be addressed in Data
The ST6 Family CPU core features six registers and
) three pairs of flags available to the programmer.
t(s These are described in the following paragraphs.
Accumulator (A). The accumulator is an 8-bit
c general purpose register used in all arithmetic cal-
du culations, logical operations, and data manipula-
ro tions. The accumulator can be addressed in Data
space as a RAM location at address FFh. Thus the
P ST6 can manipulate the accumulator just like any
te other register in Data space.
ole Figure 6. ST6 Core Block Diagram
space as RAM locations at addresses 82h (V) and
83h (W). They can also be accessed using the di-
rect and bit direct addressing modes. Thus, the
ST6 instruction set can use the short direct regis-
ters as any other register of the data space.
Program Counter (PC). The program counter is a
12-bit register which contains the address of the
next ROM location to be processed by the core.
This ROM location may be an opcode, an oper-
and, or the address of an operand. The 12-bit
length allows the direct addressing of 4096 bytes
in Program space.
Obs RESET
0,01 TO 8MHz
OSCin
OSCout
ct(s) - CONTROLLER
INTERRUPTS
DATA SPACE
Produ OPCODE
FLAG
VALUES
2
CONTROL
SIGNALS
ADDRESS/READ LINE
DATA
RAM/EEPROM
lete PROGRAM
ObsoROM/EPROM
ADDRESS 256
DECODER
DATA
ROM/EPROM
A-DATA B-DATA
DEDICATIONS
Program Counter
12
and
FLAGS
6 LAYER STACK
ACCUMULATOR
ALU
RESULTS TO DATA SPACE (WRITE LINE)
VR01811
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