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ST6285B View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
'ST6285B' PDF : 78 Pages View PDF
ST62T85B/E85B
I/O PORTS (Cont’d)
4.1.2 Safe I/O State Switching Sequence
outputs, it is advisable to keep a copy of the data
Switching the I/O ports from one state to another
should be done in a sequence which ensures that
no unwanted side effects can occur. The recom-
mended safe transitions are illustrated in Figure
register in RAM. Single bit instructions may then
be used on the RAM copy, after which the whole
copy register can be written to the port data regis-
ter:
18. All other transitions are potentially risky and SET bit, datacopy
should be avoided when changing the I/O operat-
ing mode, as it is most likely that undesirable side-
LD a, datacopy
LD DRA, a
effects will be experienced, such as spurious inter-
rupt generation or two pins shorted together by the
analog multiplexer.
Warning: Care must also be taken to not use in-
structions that act on a whole port register (INC,
Single bit instructions (SET, RES, INC and DEC) DEC, or read operations) when all 8 bits are not
should be used with great caution on Ports Data
registers, since these instructions make an implicit
available on the device. Unavailable bits must be
masked by software (AND instruction).
read and write back of the entire register. In port
input mode, however, the data register reads from
the input pins directly, and not from the data regis-
) ter latches. Since data register information in input
t(s mode is used to set the characteristics of the input
pin (interrupt, pull-up, analog input), these may be
c unintentionally reprogrammed depending on the
u state of the input pins. As a general rule, it is better
rod to limit the use of single bit instructions on data
registers to when the whole (8-bit) port is in output
P mode. In the case of inputs or of mixed inputs and
The WAIT and STOP instructions allow the
ST62xx to be used in situations where low power
consumption is needed. The lowest power con-
sumption is achieved by configuring I/Os in input
mode with well-defined logic levels.
The user must take care not to switch outputs with
heavy loads during the conversion of one of the
analog inputs in order to avoid any disturbance to
the conversion.
te Figure 18. Diagram showing Safe I/O State Transitions
ole Interrupt
bs pull-up
010*
O Input
- pull-up (Reset 000
t(s) state)
Input
011
Analog
001
Input
c Output
u Open Drain
100
101
Output
Open Drain
Prod Output
Push-pull
110
Obsolete Note *. xxx = DDR, OR, DR Bits respectively
111
Output
Push-pull
35/78
35
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