ST62E18C View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
ST62E18C
STMicroelectronics
'ST62E18C' PDF : 74 Pages View PDF
ST62T18C/E18C
DIGITAL WATCHDOG (Cont’d)
These instructions test the C bit and Reset the
MCU (i.e. disable the Watchdog) if the bit is set
(i.e. if the Watchdog is active), thus disabling the
Watchdog.
In all modes, a minimum of 28 instructions are ex-
ecuted after activation, before the Watchdog can
generate a Reset. Consequently, user software
should load the watchdog counter within the first
27 instructions following Watchdog activation
(software mode), or within the first 27 instructions
executed following a Reset (hardware activation).
It should be noted that when the GEN bit is low (in-
terrupts disabled), the NMI interrupt is active but
cannot cause a wake up from STOP/WAIT modes.
Figure 18. A typical circuit making use of the
EXERNAL STOP MODE CONTROL feature
SWI TCH
NMI
I/O
Figure 19. Digital Watchdog Block Diagram
RESET
VR02002
Q
RSF F
S
R
-27
DB 1.7 LOAD SET
8
DB0
WRITE
RESET
DATA BUS
-2 8
SET
-12
OSCILLATOR
CLOCK
V A00 010
27/82
27
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