ST72334J/N, ST72314J/N, ST72124J
REGISTER & MEMORY MAP (Cont’d)
Table 2. Hardware Register Map
Address
Block
Register
Label
Register Name
0000h
0001h
0002h
0003h
0004h
0005h
0006h
0007h
Port A
Port C
PADR
PADDR
PAOR
PCDR
PCDDR
PCOR
Port A Data Register
Port A Data Direction Register
Port A Option Register
Reserved Area (1 Byte)
Port C Data Register
Port C Data Direction Register
Port C Option Register
Reserved Area (1 Byte)
0008h
0009h
000Ah
Port B
PBDR
PBDDR
PBOR
Port B Data Register
Port B Data Direction Register
Port B Option Register
000Bh
000Ch
000Dh
000Eh
000Fh
0010h
0011h
0012h
0013h
0014h
0015h
0016h
0017h
to
001Fh
0020h
0021h
0022h
0023h
0024h
to
0028h
0029h
Port E
Port D
Port F
PEDR
PEDDR
PEOR
PDDR
PDDDR
PDOR
PFDR
PFDDR
PFOR
Reserved Area (1 Byte)
Port E Data Register
Port E Data Direction Register
Port E Option Register
Reserved Area (1 Byte)
Port D Data Register
Port D Data Direction Register
Port D Option Register
Reserved Area (1 Byte)
Port F Data Register
Port F Data Direction Register
Port F Option Register
Reserved Area (9 Bytes)
MISCR1
Miscellaneous Register 1
SPIDR
SPI Data I/O Register
SPI
SPICR
SPI Control Register
SPISR
SPI Status Register
Reserved Area (5 Bytes)
MCC
MCCSR
Main Clock Control / Status Register
Reset
Status
Remarks
00h
R/W
00h
R/W
00h
R/W 1)
00h
R/W
00h
R/W
00h
R/W
00h
R/W
00h
R/W
00h
R/W 1)
00h
R/W
00h
R/W
00h
R/W 1)
00h
R/W
00h
R/W
00h
R/W 1)
00h
R/W
00h
R/W
00h
R/W
00h
R/W
xxh
R/W
0xh
R/W
00h
Read Only
01h
R/W
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