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ST72P314J2T View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
'ST72P314J2T' PDF : 153 Pages View PDF
ST72334J/N, ST72314J/N, ST72124J
8.6 SUPPLY, RESET AND CLOCK CHARACTERISTICS
8.6.1 Supply Manager
Recommended operating conditions
with TA=-40 to +85oC and voltage are referred to VSS unless otherwise specified.
LOW VOLTAG E DETECTOR (LVD)
Symbol
Parameter
VLVDr
Reset release threshold
(VDD rise)
VLVDf
VLVDhyst
IDD
Reset generation threshold
(VDD fall)
VLVD Hysteresis 2)
LVD Supply Current
Condition s
Min
High Threshold
Med. Threshold (fOSC16MHz)
Low Threshold (fOSC8MHz)
High Threshold
3.85
Med. Threshold (fOSC16MHz) 3.50
Low Threshold (fOSC8MHz) 3.00
VLVDr - VLVDf
HALT mode
Typ 1)
4.30
3.90
3.35
4.05
3.65
3.10
250*
100
Max
4.50
4.05
3.45
4.25
3.80
3.20
150 3)
Unit
V
mV
µA
8.6.2 Reset Sequence Manager
Recommended operating conditions
with TA=-40...+85oC and 4.5V<VDD-VSS<5.5V unless otherwise specified.
RESET SEQUENCE MANAGER (RSM)
Symbol
Parameter
RON
tDELAYmin
tPULSE
Reset weak pull-up resistance
Reset delay for external and
watchdog reset sources
External RESET pin Pulse time
Condition s
VIN > VIH
VIN < VIL
Min Typ 4) Max Unit
5
40
10
80
20
160
k
6
1/fSFOSC
30
µs
20
µs
8.6.3 Multi-Oscillator, Clock Security System
Recommended operating conditions
with TA=-40 to +85oC and voltage are referred to VSS unless otherwise specified.
EXTERNAL CLOCK SOURCE
Symbol
VOSC1h
VOSC1l
Parameter
OSC1 input pin high level voltage
OSC1 input pin low level voltage
Condition s
Square wave signal
with ~50% Duty Cycle
Min
0.7xVDD
VSS
Typ
Max
VDD
0.3xVDD
Unit
V
Notes:
1) LVD typical data are based on TA=25°C. They are given only as design guidelines and are not tested.
2) The VLVDhyst hysteresis is constant.
3) Data based on characterization results, not tested in production.
4) Unless otherwise specified, typical data are based on TA=25°C and VDD-VSS=5V. They are given only as design guide-
lines and are not tested.
109/125
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