ST72P314J2T View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
ST72P314J2T
STMicroelectronics
'ST72P314J2T' PDF : 153 Pages View PDF
ST72334J/N, ST72314J/N, ST72124J
RESET SEQUENCE MANAGER (Cont’d)
External RESET pin
The RESET pin is both an input and an open-drain
output with integrated RON weak pull-up resistor.
This pull-up has no fixed value but varies in ac-
cordance with the input voltage. It can be pulled
low by external circuitry to reset the device.
Figure 16. External RESET Sequences
VDDnominal
VLVDf
VDD
A RESET signal originating from an external
source must have a duration of at least tPULSE in
order to be recognized. Two RESET sequences
can be associated with this RESET source as
shown in Figure 16.
Starting from the external RESET pulse recogni-
tion, the device RESET pin acts as an output that
is pulled low during at least tDELAYmin.
RUN
t PUL SE
RESET
DELAY
INTERNAL RESET FETCH
4096 CLOCK CYCLES VECTOR
tDE LAYmin
RUN
EXTERNAL RESET SOURCE
RESET PIN
VDDnominal
VLVDf
VDD
RUN
t PUL SE
WATCHDOG RESET
DELAY
RESET
INTERNAL RESET FETCH
4096 CLOCK CYCLES VECTOR
RUN
EXTERNAL RESET SOURCE
RESET PIN
WATCHDOG RESET
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