ST72334J/N, ST72314J/N, ST72124J
RESET SEQUENCE MANAGER (Cont’d)
Internal Low Voltage Detection RESET
Two different RESET sequences caused by the in-
ternal LVD circuitry can be distinguished:
s Power-On RESET
Figure 17. LVD RESET Sequences
VDDnominal
VLVDr
VDD
s Voltage Drop RESET
The device RESET pin acts as an output that is
pulled low when VDD<VLVDr (rising edge) or
VDD<VLVDf (falling edge) as shown in Figure 9.
VDD
VDDnominal
VLVDr
VLVDf
RUN
DELAY
RESET
INTERNAL RESET FETCH
4096 CLOCK CYCLES VECTOR
RUN
EXTERNAL RESET SOURCE
RESET PIN
WATCHDOG RESET
RESET
DELAY
INTERNAL RESET FETCH
4096 CLOCK CYCLES VECTOR
RUN
EXTERNAL RESET SOURCE
RESET PIN
WATCHDOG RESET
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