ST75951
PIN DESCRIPTION (continued)
4.2 - General Purpose Interrupt System (GPI)
The GPI will reflect any change of the GPIO’S
inputs or RING output when non-masked, so the
processor does not need to read the output control
word continuously. GPI level change tells the proc-
essor, one of the non-masked input pins level has
changed and he can read the control word. So
GPIO could extend the number of interrupt pins of
the processor.
5 - Ring
This pin is used for the Ring detect but also reports
the Line status, current limit.
6 - Digital Test Pin (TSTD1)
This pin is reserved for digital test purpose.
7 - Crystal (XTALIN , XTALOUT)
These pins must be tied to an external crystal or a
master clock generator (MCLK).
8 - Analog Interface (12 Pins)
8.1 - DAC and ADC Reference Voltage Output
(VREFP, VREFN )
These pins provide the positive and negative
reference Voltage used by the 16-bit converters.
The reference voltage, VREF, is the voltage difference
between the VREFP and VREFN outputs.
VREFP and VREFN should be externally decoupled
with respect to VCM.
8.2 - Common Mode Voltage Output (VCM)
This output pin is the common mode voltage
(AVDD - AGND)/2 . This output must be decoupled
with respect to GND.
8.3 - Common Mode Voltage Input (VCMP, VCMS)
These input pins are the common mode voltage for
internal circuitry. They have to be connected exter-
nally to VCM.
8.4 - Analog Transmit Output (D1 ,D2)
These pins are the output of the fully differential
converted analog signal, modulated at F0
(1MHz < F0 < 1.7MHz).
The digital data IN signal is converted in analog
signals (with (Sin X)/X compensation). Two ranges
of signal amplitude have to be considered ; modem
application with dynamic up to 2.5VPP with maxi-
mum performances SNDR = 83dB, voice applica-
tion with dynamic up to 3.2VPP differential
(SNDR = 75dB).
The transmit output stage can be programmed to
+2dB gain, 0db gain, 6dB or infinite attenuation.
8.5 - Analog Receive Inputs (D3, D4)
These pins are the differential analog inputs. These
analog inputs are presented to the F0 demodulator
and the sigma-delta modulator. The analog input
peak-to-peak differential signal range must be less
than 2.5 VPP. The gain of the receive stage is
programmable to 0dB or 6dB.
8.6. - Analog Test Pin (TSTA1, TSTA2)
These pins are reserved for analog test purpose.
8.7 Analog Auxiliary Receive Inputs (AUXIN)
This pin is the auxiliary analog input. This analog
input is presented to the analog modulator. The
analog input peak-to-peak signal range must be
less than 1.25 VPP. The gain of the receive stage
is 0dB.
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