ST7715 View Datasheet(PDF) - Sitronix Technology Co., Ltd.
Part Name
Description
MFG CO.
'ST7715' PDF : 167 Pages View PDF
ST7715
9.2.1 Write cycle sequence
The write cycle means that the host writes information (command or/and data) to the display via the interface. Each write
cycle (WRX high-low-high sequence) consists of 3 control signals (D/CX, RDX, WRX) and data signals (D[17:0]). D/CX bit
is a control signal, which tells if the data is a command or a data. The data signals are the command if the control signal is
low (=’0’) and vice versa it is data (=’1’).
WRX
D[17:0]
The host starts to control D[17:0]
lines when there is a falling edge
of the WRX.
The display writes D[17:0] lines
when there is a rising edge of
WRX.
The host stops to
control D[17:0] lines.
Fig. 9.2.1 8080-series WRX protocol
Note: WRX is an unsynchronized signal (It can be stopped).
1-byte
2-byte
command command
N-byte
command
D[17:0]
S
CMD CMD
PA1
CMD
PA1
PAN-2
PAN-1
P
RESX “1”
CSX
D/CX
RDX
“1”
WRX
D[17:0]
S
CMD CMD
PA1
CMD
PA1
PAN-2
PAN-1
P
Host D[17:0]
Host to LCD
Driver D[17:0]
LCD to Host
S
CMD CMD
PA1
CMD
Hi-Z
CMD: write command code
PA: parameter or display data
PA1
PAN-2
PAN-1
P
Signals on D[17:0], D/CX, R/WX, E
pins during CSX=1 are ignored.
Fig. 9.2.2 8080-series parallel bus protocol, write to register or display RAM
9.2.2 Read cycle sequence
The read cycle (RDX high-low-high sequence) means that the host reads information from LCD driver via interface. The
driver sends data (D[17:0]) to the host when there is a falling edge of RDX and the host reads data when there is a rising
edge of RDX.
V1.5
27
2009-12-04
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