ST7FDALI View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

ST7FDALI

8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI, DALI

STMicroelectronics 

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ST7DALI

OPERATING CONDITIONS (Cont’d)

13.3.4.2 Devices with ‘”6” order code suffix (tested for TA = -40 to +85°C) @ VDD = 2.7 to 3.3V

Symbol

Parameter

Conditions

Min Typ Max Unit

fRC

Internal RC oscillator fre- RCCR = FF (reset value), TA=25°C, VDD= 3.0V

quency

RCCR=RCCR12) ,TA=25°C,VDD= 3V

560

700

kHz

Accuracy of Internal RC TA=25°C,VDD=3V

-2

+2 %

ACCRC

oscillator when calibrated

with RCCR=RCCR11)2)

TA=25°C,VDD=2.7 to 3.3V

TA=-40 to +85°C,VDD=3V

-25

+25 %

-15

15 %

IDD(RC)

RC oscillator current con-

sumption

TA=25°C,VDD=3V

7001)

µA

tsu(RC)

fPLL

tLOCK

tSTAB

ACCPLL

tw(JIT)

JITPLL

IDD(PLL)

RC oscillator setup time

x4 PLL input clock

PLL Lock time5)

PLL Stabilization time5)

TA=25°C,VDD=3V

x4 PLL Accuracy

fRC = 1MHz@TA=25°C,VDD=2.7 to 3.3V

fRC = 1MHz@TA=40 to +85°C,VDD= 3V

PLL jitter period

fRC = 1MHz

PLL jitter (∆fCPU/fCPU)

PLL current consumption TA=25°C

0.71)

102) µs

MHz

2

ms

4

ms

0.14)

%

0.14)

%

83)

kHz

13)

%

1901)

µA

Notes:

1. Data based on characterization results, not tested in production

2. RCCR1 is a factory-calibrated setting for 700MHz with ±0.2 accuracy @ TA =25°C, VDD=3V. See “INTERNAL RC OS-

CILLATOR ADJUSTMENT” on page 23.

3. Guaranteed by design.

4. Averaged over a 4ms period. After the LOCKED bit is set, a period of tSTAB is required to reach ACCPLL accuracy

5. After the LOCKED bit is set ACCPLL is max. 10% until tSTAB has elapsed. See Figure 11 on page 24.

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