ST7FLITEU0ICD View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
ST7FLITEU0ICD
STMicroelectronics
'ST7FLITEU0ICD' PDF : 124 Pages View PDF
Central processing unit
ST7LUS5, ST7LU05, ST7LU09
Figure 7. CPU registers
7
0
Reset value = XXh
7
0
Reset value = XXh
7
0
Reset value = XXh
Accumulator
X index register
Y index register
15
PCH
87
PCL
0
OObbssoolleettee PPrroodduucctt((ss)) -- OObbssoolleettee PPrroodduucctt((ss)) 5.3.4
Program counter
Reset value = Reset vector @ FFFEh-FFFFh
7
0
1 1 1 H I N Z C Condition code register
Reset value = 1 1 1 X 1 X X X
15
87
Reset value = Stack higher address
0
Stack pointer
X = Undefined value
Condition code register (CC)
CC
Reset value: 111x1xxx
7
6
5
4
3
2
1
0
1
1
1
H
I
N
Z
C
-
-
-
R/W
R/W
R/W
R/W
R/W
The 8-bit condition code register contains the interrupt mask and four flags representative of
the result of the instruction just executed. This register can also be handled by the PUSH
and POP instructions.
These bits can be individually tested and/or controlled by specific instructions.
Table 5. CC register description
Bit Name
Function
7:5 - Reserved, must remain set.
Half carry
This bit is set by hardware when a carry occurs between bits 3 and 4 of the ALU
during an ADD or ADC instruction. It is reset by hardware during the same
4H
instructions.
0: No half carry has occurred.
1: A half carry has occurred.
This bit is tested using the JRH or JRNH instruction. The H bit is useful in BCD
arithmetic subroutines.
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