Supply, reset and clock management
Figure 10. Clock management block diagram
ST7LUS5, ST7LU05, ST7LU09
CR9 CR8 CR7 CR6 CR5 CR4 CR3 CR2 RCCR
CR1 CR0
SICSR
Tunable
internal RC oscillator
RC/AWU CKCNTCSR
- Obsolettee PPrroodduucctt((ss)) CLKIN
8 MHz(fRC)
Prescaler
8 MHz
4 MHz
2 MHz
1 MHz
500 kHz
RC OSC
CK2 CK1 CK0
AWU
RC
fCLKIN
/2
divider
33 kHz
Clock
controller
AWU CK
Ext clock
fOSC
INTRCPRR
CKSEL[1:0]
option bits
OObbssoolleettee PPrroodduucctt((ss)) - Obsole fOSC
/32 divider
13-bit
Lite timer counter
fOSC
0
fOSC/32 1
fLTIMER
(1ms timebase @ 8 MHz fOSC)
fCPU
To CPU and
peripherals
MCO SMS MCCSR
MCO
32/124