ST7LUS5, ST7LU05, ST7LU09
Interrupts
7.3.1 External interrupt control register 1 (EICR1)
EICR1
7
6
Reserved
-
5
4
IS2[1:0]
R/W
Reset value: 0000 0000 (00h)
3
2
1
0
IS1[1:0]
IS0[1:0]
R/W
R/W
Table 16. EICR1 register description
Bit Name
Function
7:6
-
Reserved
) ei2 sensitivity
t(s 5:4 IS2[1:0]
These bits define the interrupt sensitivity for ei2 according to Table 18.
c ei1 sensitivity
u 3:2 IS1[1:0]
d These bits define the interrupt sensitivity for ei1 according to Table 18.
ro ) ei0 sensitivity
P t(s 1:0 IS0[1:0]
These bits define the interrupt sensitivity for ei0 according to Table 18.
lete uc Note: 1 These 8 bits can be written only when the I bit in the CC register is set.
so rod 2 Changing the sensitivity of a particular external interrupt clears this pending interrupt. This
can be used to clear unwanted pending interrupts. Refer to section External interrupt
b P function on page 66.
) - O lete 7.3.2 External interrupt control register 2 (EICR2)
ct(s bso EICR2
Reset value: 0000 0000 (00h)
u O 7
6
5
4
3
2
1
0
rod ) - Reserved
IS4[1:0]
IS3[1:0]
P t(s -
R/W
R/W
lete duc Table 17. EICR2 register description
so ro Bit Name
Function
b P 7:4
-
Reserved
O te ei4 sensitivity
le3:2 IS4[1:0]
These bits define the interrupt sensitivity for ei1 according to Table 18.
so ei3 sensitivity
b 1:0 IS3[1:0]
O These bits define the interrupt sensitivity for ei0 according to Table 18.
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