ST7FLU05MCE View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
ST7FLU05MCE
STMicroelectronics
'ST7FLU05MCE' PDF : 124 Pages View PDF
Supply, reset and clock management
ST7LUS5, ST7LU05, ST7LU09
6.2.3 System integrity (SI) control/status register (SICSR)
SICSR
7
Reserved
-
6
5
CR[1:0]
R/W
4
3
Reserved
-
Reset value: 0000 0x00 (0xh)
2
1
0
LVDRF
Reserved
R/W
-
Table 9. SICSR register description
Bit Name
Function
OObbssoolleettee PPrroodduucctt((ss)) -- OObbssoolleettee PPrroodduucctt((ss)) 6.2.4
7
- Reserved, must be kept cleared.
RC oscillator frequency adjustment bits
6:5 CR[1:0]
These bits, as well as CR[9:2] bits in the RCCR register must be written
immediately after reset to adjust the RC oscillator frequency and to obtain the
required accuracy. Refer to Section 6.1 on page 31.
4:3 - Reserved, must be kept cleared.
System integrity bits
2:0 LVDRF
Refer to Section 7.4: System integrity management (SI).
1:0 - Reserved, must be kept cleared.
Internal RC prescaler selection register (INTRCPRR)
INTRCPRR
Reset value: 0000 0011 (03h)
7
6
5
4
3
2
1
0
CK[2:0]
Reserved
R/W
-
Table 10. INTRCPRR register description
Bit Name
Function
Internal RC prescaler selection
7:5 CK[2:0]
These bits are set by software and cleared by hardware after a reset. These bits
select the prescaler of the internal RC oscillator as follows (see also Figure 13 on
page 37):
000: fOSC = 8 MHz
001: fOSC = 4 MHz
010: fOSC = 2 MHz
011: fOSC = 1 MHz
100: fOSC = 500 kHz
Notes:
1. If the internal RC is used with a supply operating range below 3.3V, a division
ratio of at least 2 must be enabled in the RC prescaler.
2. Configuration '000' is not allowed at 3.3V operation.
4:0
- Reserved, must be kept cleared.
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