ST7LITE25F2 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
ST7LITE25F2
STMicroelectronics
'ST7LITE25F2' PDF : 170 Pages View PDF
ST7LITE20F2 ST7LITE25F2 ST7LITE29F2
Power saving modes
instruction. The main reason for this is that the I/O may be wrongly configured due to
external interference or by an unforeseen logical condition.
● For the same reason, reinitialize the level sensitiveness of each external interrupt as a
precautionary measure.
● The opcode for the HALT instruction is 0x8E. To avoid an unexpected HALT instruction
due to a program counter failure, it is advised to clear all occurrences of the data value
0x8E from memory. For example, avoid defining a constant in program memory with
the value 0x8E.
● As the HALT instruction clears the interrupt mask in the CC register to allow interrupts,
the user may choose to clear all pending interrupt bits before executing the HALT
instruction. This avoids entering other peripheral interrupt routines after executing the
external interrupt routine corresponding to the wake-up event (reset or external
interrupt).
9.5
ACTIVE-HALT mode
ACTIVE-HALT mode is the lowest power consumption mode of the MCU with a real time
clock available. It is entered by executing the ‘HALT’ instruction.
The decision to enter either in ACTIVEHALT or HALT mode is given by the LTCSR/ATCSR
register status as shown in the following table:
Table 18. ACTIVE-HALT mode
LTCSR1 TB1IE
bit
ATCSR OVFIE
bit
ATCSRCK1
bit
ATCSRCK0 bit
Meaning
0
x
x
0
ACTIVE-HALT
0
0
x
x
mode disabled
1
x
x
x
ACTIVE-HALT
x
1
0
1
mode enabled
The MCU can exit ACTIVE-HALT mode on reception of a specific interrupt (see Table 12:
Interrupt mapping) or a RESET:
● When exiting ACTIVE-HALT mode by means of a RESET, a 256 or 4096 CPU cycle
delay occurs. After the start up delay, the CPU resumes operation by fetching the reset
vector which woke it up (see Figure 27: ACTIVE-HALT mode Flow-chart).
● When exiting ACTIVE-HALT mode by means of an interrupt, the CPU immediately
resumes operation by servicing the interrupt vector which woke it up (see Figure 27:
ACTIVE-HALT mode Flow-chart).
When entering ACTIVE-HALT mode, the I bit in the CC register is cleared to enable
interrupts.
Therefore, if an interrupt is pending, the MCU wakes up immediately.
In ACTIVE-HALT mode, only the main oscillator and the selected timer counter (LT/AT) are
running to keep a wake-up time base. All other peripherals are not clocked except those
which get their clock supply from another clock generator (such as external or auxiliary
oscillator).
Doc ID 8349 Rev 5
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