ST8004CD View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST8004CD' PDF : 19 Pages View PDF
ST8004
pulse, the output voltage only depends on the internal pull-up resistor, and on the load current. The
maximum frequency on these lines is 1MHz.
INACTIVE STATE
After power-on reset, the circuit enters the inactive state.
A minimum number of circuits are active while
waiting for the microcontroller to start a session.
• All card contacts are inactive (approximately 200Ω to GND); I/OUC, AUX1UC and AUX2UC are high
impedance (10 kΩ pull-up resistor connected to VDD)
• Voltage generators are stopped
• XTAL oscillator is running
• Voltage supervisor is active.
ACTIVATION SEQUENCE
After power-on and, after the internal pulse width delay, the microcontroller may check the presence of the
card with the signal OFF (OFF = HIGH while CMDVCC is High means that the card is present; OFF = LOW
while CMDVCC is HIGH means that no card is present).
If the card is in the reader (which is the case if PRES or PRES is true), the microcontroller may start a card
session by pulling CMDVCC LOW. The following sequence then occurs (see Fig.3):
• CMDVCC is pulled LOW (t0)
• The voltage doubler is started (t1~t0)
• VCC rises from 0 to 5 or 3V with a controlled slope (t2 = t1 +½3T)(I/O, AUX1 and AUX2 follow VCC with
a slight delay); T is 64 times the period of the internal oscillator, approximately 25µs
• I/O, AUX1 and AUX2 are enabled (t3 = t1 +4T)
• CLK is applied to the C3 contact (t4)
• RST is enabled (t5 = t1 +7T).
The clock may be applied to the card in the following way: set RSTIN High before setting CMDVCC Low,
and reset it Low between t3 and t5; CLK will start at this moment. RST will remain LOW until t5, where
RST is enabled to be the copy of RSTIN. After t5, RSTIN has no further action on CLK. This is to allow a
precise count of CLK pulses before toggling RST. If this feature is not needed, then CMDVCC may be set
LOW with RSTIN Low. In this case, CLK will start at t3, and after t5, RSTIN may be set High in order to get
the Answer To Request (ATR) from the card.
ACTIVE STATE
When the activation sequence is completed, the ST8004 will be in the active state. Data are exchanged
between the card and the microcontroller via the I/O lines. The ST8004 is designed for cards without VPP
(this is the voltage required to program or erase the internal non-volatile memory).
Depending on the layout and on the application test conditions (for example with an additional 1pF cross
capacitance between C2/C3 and C2/C7) it is possible that C2 is polluted with high frequency noise from
C3. In this case, it will be necessary to connect a 220pF capacitor between C2 and CGND.
It is recommended to:
1. Keep track C3 as far as possible from other tracks
2. Have straight connection between CGND and C5 (the 2 capacitors on C1 should be connected to this
ground track)
3. Avoid ground loops between CGND,PGND and GND
4. Decoupled VDDP and VDD separately; if the 2 supplies are the same in the application, then they should
be connected in star on the main track.
With all these layout precautions, noise should be at an acceptable level, and jitter on C3 should be less
than 100ps.
DEACTIVATION SEQUENCE
When a session is completed, the microcontroller sets the CMDVCC line to the HIGH state. The circuit
then executes an automatic deactivation sequence by counting the sequencer back and ends in the
inactive state (see Fig.4):
• RST goes LOW → (t11 = t10)
• CLK is stopped LOW → (t12 = t11 +½T) where T is approximately 25 µs
• I/O, AUX1 and AUX2 are output into high-impedance state → (t13 = t11 +T)(10 kΩ pull-up resistor
connected to VCC)
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