ST90135M5Q6 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST90135M5Q6' PDF : 190 Pages View PDF
ST90158 - RESET AND CLOCK CONTROL UNIT (RCCU)
6.5 OSCILLATOR CHARACTERISTICS
The on-chip oscillator circuit uses an inverting gate
circuit with tri-state output.
Notes: It is recommended to place the quartz or
crystal as close as possible to the ST9 to reduce
the parasitic capacitance. At low temperature,
frost and humidity might prevent a correct start-up
of the oscillator.
OSCOUT must not be used to drive external cir-
cuits.
When the oscillator is stopped, OSCOUT goes
high impedance.
In Halt mode, set by means of the HALT instruc-
tion, the parallel resistor, R, is disconnected and
the oscillator is disabled, forcing the internal clock,
CLOCK1, to a high level, and OSCOUT to a high
impedance state.
To exit the HALT condition and restart the oscilla-
tor, an external RESET pulse is required, having a
a minimum duration of 12ms, as illustrated in Fig-
ure 41
It should be noted that, if the Watchdog function is
enabled, a HALT instruction will not disable the os-
cillator. This to avoid stopping the Watchdog if a
HALT code is executed in error. When this occurs,
the CPU will be reset when the Watchdog times
out or when an external reset is applied.
Table 15. Oscillator Transconductance
gm
Min
5V Operation
0.77
mA/V
3V Operation
0.42
Typ
1.5
0.73
Max
2.4
1.47
Figure 37. Crystal Oscillator
CRYSTAL CLOCK
Table 16. Crystal Internal Resistance(Ω) (5V
Op.)
C1=C2
Freq.
5 Mhz
4 Mhz
3 Mhz
56pF
110
150
270
47pF
120
200
350
33pF
210
330
560
22pF
340
510
850
Table 17. Crystal Internal Resistance(Ω) (3V
Op.)
C1=C2
Freq.
5 Mhz
4 Mhz
3 Mhz
56pF
35
55
100
47pF
45
70
135
33pF
75
125
220
22pF
120
195
350
Legend:
CL1, CL2: Maximum Total Capacitance on pins OSCIN
and OSCOUT (the value includes the external capaci-
tance tied to the pin CL1 and CL2 plus the parasitic capac-
itance of the board and of the device).
Note: The tables are relative to the fundamental quartz
crystal only (not ceramic resonator).
Figure 38. Internal Oscillator Schematic
HALT
R
RIN
ROUT
ST9
OSCIN
OSCOUT
OSCI N
OSCOUT
Figure 39. External Clock
EXTERNAL CLOCK
CL1
CL2
1MΩ
*Recommended for oscillator stability
ST9
OSCI N
OSC OUT
NC
CLOCK
INPU T
77/190
9
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