STA003T
SCKL_POL
Address: 0x0D
Type: R/W
Software Reset: 0x04
Hardware Reset: 0x04
MSB
LSB
b7 b6 b5 b4 b3 b2 b1 b0
X X X X X 0 0 0 (1)
1 0 0 (2)
X = don’t care
SCKL_POL is used to select the working polarity
of the Input Serial Clock (SCKR).
(1) If SCKL_POL is set to 0x00, the data (SDI)
are sent with the falling edge of SCKR
and sampled on the rising edge.
(2) If SCKL_POL is set to 0x04, the data (SDI)
are sent with the rising edge of SCKR and
sampled on the falling edge.
ERROR_CODE
Address: 0x0F
Type: RO
Software Reset: 0x00
Hardware Reset: 0x00
MSB
LSB
b7 b6 b5 b4 b3 b2 b1 b0
X X X X 0 0 0 0 (1)
0 0 0 1 (2)
0 0 1 0 (3)
X = don’t care
ERROR_CODE register contains the last error
occourred if any. The codes can be as follows:
Code
(1) 0x00
(2) 0x01
(3) 0x02
Description
No error since the last SW or HW Reset
CRC Failure
DATA not available
SOFT_RESET
Address: 0x10
Type: WO
Software Reset: 0x00
Hardware Reset: 0x00
MSB
LSB
b7 b6 b5 b4 b3 b2 b1 b0
X
X
X
X
X
X
X
0
1
X = don’t care; 0 = normal operation; 1 = reset
When this register is written, a soft reset occours.
The STA003T core command register and the in-
terrupt register are cleared. The decoder goes in
to idle mode.
PLAY
Address: 0x13
Type: R/W
Software Reset: 0x00
Hardware Reset: 0x00
MSB
LSB
b7 b6 b5 b4 b3 b2 b1 b0
X
X
X
X
X
X
X
0
1
X = don’t care; 0 = normal operation; 1 = play
The PLAY command is handled according to the
state of the decoder, as described in section 2.5.
PLAY only becomes active when the decoder is
in DECODE mode.
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