STA310 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'STA310' PDF : 90 Pages View PDF
STA310
6 S/PDIF OUTPUT
The S/PDIF output pad is a TTL output pad with slew rate control. The output DC capability is 4 mA. The voltage
drop is 3V. This output must be connected to a TTL driver before the transformer.
The S/PDIF output supports SPDIF and IEC-61937 standards. Several registers must be initialized to configure
the SPDIF output:
- The category code must be entered in the IEC958_CAT register. It is related to the type of application.
The category code is specified in the Digital Output Interface standard.
- The status bits that will be transmitted on the SPDIF output, must be programmed in the
IEC958_STATUS register.
- IEC clock setting must be specified in the IEC958_CONF register.
- The data type dependent information can be specified in the IEC958_DTDI register.
- The S/PDIF type is selected through the IEC958_CMD register: the IEC unit can output decoded data
(PCM mode), encoded data, or null data.
Note: 1. The SPDIF output handles only 48kHz or 44.1kHz sample rates.
6.1 SPDIF output
When configured in SPDIF mode, the S/PDIF output is used to transmit either the L/R channels (PCMOUT1) or
VCR_L/VCR_R (PCMOUT0).
The selection is done by choosing the PCM mode and AUX = 1 in the register SPDIF_CMD and resetting the
COM status of SPDIF_STATUS register.
6.2 IEC-61937 output
When configured in IEC-61937 mode, the S/PDIF output is used to transmit encoded data taken directly from
the frame buffer.
The selection is done by choosing the encoded mode (ENC mode) in the register IEC958_CMD and setting the
bit COM in IEC958_STATUS register.
The decompressed data are output simultaneously on the PCM_OUT outputs.
Latency in software versions 6 and later
For software versions 6 and later, when choosing to output encoded S/PDIF data, a latency is automatically in-
serted between S/PDIF output and PCM outputs. The PCM outputs are delayed compared to the SPDIF output.
The latency value is defined by standards and applied when the auto-latency mode is selected.
AC3 decoding
Latency
= 1/Fs * (1/3 * Framesize + 256)
= 1/Fs * (32 * Datarate/Fs + 256)
MPEG decoding
Latency
= 1/Fs * (36 * Datarate/Fs + 96)
where Fs is the sampling frequency in kHz, Framesize is expressed in 16-bit words, Datarate is the bit rate in
kbits per second.
The latency insertion can not be disabled however it can be programmed to values different from those required
in the standard by selecting the user-programmable-latency mode (by setting the bit 7 of IEC858_CONF regis-
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