STA339BW
Register description
7.11.7
7.11.8
Note:
Limiter 2 Extended attack threshold (addr 0x34)
D7
EATHEN2
TBD
D6
EATH2[6]
TBD
D5
EATH2[5]
TBD
D4
EATH2[4]
TBD
D3
EATH2[3]
TBD
D2
EATH2[2]
TBD
The extended attack threshold value is determined as follows:
attack threshold = -12 + EATH2 / 4
Limiter 2 Extended release threshold (addr 0x35)
D1
EATH2[1]
TBD
D0
EATH2[0]
TBD
D7
ERTHEN2
TBD
D6
ERTH2[6]
TBD
D5
ERTH2[5]
TBD
D4
ERTH2[4]
TBD
D3
ERTH2[3]
TBD
D2
ERTH2[2]
TBD
D1
ERTH2[1]
TBD
The extended release threshold value is determined as follows:
release threshold = -12 + ERTH2 / 4
Attack/release threshold step is 0.125 dB in the range -12 dB and 0 dB.
D0
ERTH2[0]
TBD
7.12 User-defined coefficient control registers (addr 0x16 - 0x26)
7.12.1 Coefficient address register
D7
D6
Reserved
0
D5
CFA5
0
D4
CFA4
0
D3
CFA3
0
D2
CFA2
0
D1
CFA1
0
D0
CFA0
0
7.12.2 Coefficient b1 data register bits 23:16
7.12.3
D7
C1B23
0
D6
C1B22
0
D5
C1B21
0
D4
C1B20
0
D3
C1B19
0
Coefficient b1 data register bits 15:8
D2
C1B18
0
D1
C1B17
0
D0
C1B16
0
D7
C1B15
0
D6
C1B14
0
D5
C1B13
0
D4
C1B12
0
D3
C1B11
0
D2
C1B10
0
D1
C1B9
0
D0
C1B8
0
7.12.4 Coefficient b1 data register bits 7:0
D7
C1B7
0
D6
C1B6
0
D5
C1B5
0
D4
C1B4
0
D3
C1B3
0
D2
C1B2
0
D1
C1B1
0
D0
C1B0
0
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