STA3398 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
STA3398
STMicroelectronics
'STA3398' PDF : 78 Pages View PDF
STA339BW
Register description
7.12.12 Coefficient a2 data register bits 15:8
D7
C4B15
0
D6
C4B14
0
D5
C4B13
0
D4
C4B12
0
D3
C4B11
0
D2
C4B10
0
D1
C4B9
0
D0
C4B8
0
7.12.13 Coefficient a2 data register bits 7:0
D7
C4B7
0
D6
C4B6
0
D5
C4B5
0
D4
C4B4
0
D3
C4B3
0
D2
C4B2
0
D1
C4B1
0
D0
C4B0
0
7.12.14 Coefficient b0 data register bits 23:16
D7
C5B23
0
D6
C5B22
0
D5
C5B21
0
D4
C5B20
0
D3
C5B19
0
7.12.15 Coefficient b0 data register bits 15:8
D2
C5B18
0
D1
C5B17
0
D0
C5B16
0
D7
C5B15
0
D6
C5B14
0
D5
C5B13
0
D4
C5B12
0
D3
C5B11
0
D2
C5B10
0
D1
C5B9
0
D0
C5B8
0
7.12.16 Coefficient b0 data register bits 7:0
D7
C5B7
0
D6
C5B6
0
D5
C5B5
0
D4
C5B4
0
D3
C5B3
0
D2
C5B2
0
D1
C5B1
0
D0
C5B0
0
7.12.17 Coefficient write/read control register
D7
D6
D5
D4
D3
D2
D1
D0
Reserved
RA
R1
WA
W1
0
0
0
0
0
Coefficients for user-defined EQ, mixing, scaling, and bass management are handled
internally in the STA339BW via RAM. Access to this RAM is available to the user via an I2C
register interface. A collection of I2C registers are dedicated to this function. One contains a
coefficient base address, five sets of three store the values of the 24-bit coefficients to be
written or that were read, and one contains bits used to control the write/read of the
coefficient(s) to/from RAM.
Three different RAM banks are embedded in STA339BW. The three banks are managed in
paging mode using EQCFG register bits. They can be used to store different EQ settings.
For speaker frequency compensation, a sampling frequency independent EQ must be
implemented. Computing three different coefficients set for 32 kHz, 44.1kHz, 48 kHz and
downloading them into the three RAM banks, it is possible to select the suitable RAM block
depending from the incoming frequency with a simple I2C write operation on register 0x31.
DocID15251 Rev 7
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