STE100A View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'STE100A' PDF : 82 Pages View PDF
STE10/100A
Registers and descriptors description
Table 6. Configuration registers description (continued)
Bit #
Name
Description
Default RW type
31~10
9~1
0
BRBA
---
BRE
Boot ROM base address. This value indicates the
address mapping of the boot ROM field as well as X: b31~17 R/W
defining the boot ROM size. The values of bit 16~10
are set to 0 indicating that the STE10/100A supports 0: b16~10
RO
up to 128Kbit of boot ROM.
Reserved
RO R/W
R/W
Boot ROM enable. The STE10/100A will only enable
its boot ROM access if both the memory space
access bit (bit 1 of CR1) and this bit are set to 1.
0
R/W
1: enable boot ROM. (If bit 1 of CR1 is also set).
CR13 (offset = 34h), CP - Capabilities pointer
31~8
7~0
--- Reserved
CP Capabilities pointer
C0h
RO
CR15 (offset = 3ch), CI - Configuration interrupt
31~24
23~16
15~ 8
7~0
Max_Lat register. This value indicates how often the
ML
STE10/100A needs to access to the PCI bus in units From
of 250ns. This value is loaded from serial EEPROM EEPROM
RO
as a result of power-on or hardware reset.
Min_Gnt register. This value indicates how long the
STE10/100A needs to retain the PCI bus ownership From
MG whenever it initiates a transaction, in units of 250ns.
RO
This value is loaded from serial EEPROM as a result EEPROM
power-on or hardware reset.
Interrupt Pin. This value indicates one of four
interrupt request pins to which the STE10/100A is
IP connected.
01h
RO
01h: means the STE10/100A always connects to
INTA#.
Interrupt Line. This value indicates the system
interrupt request lines to which the INTA# of
IL
STE10/100A is routed. The BIOS will fill this field
when it initializes and configures the system. The
0
R/W
STE10/100A driver can use this value to determine
priority and vector information.
CR16 (offset = 40h), DS - Driver space for special purpose
31~16
--- Reserved
Driver space for implementation-specific purpose.
15~8
DS
Since this area won’t be cleared upon software
reset, an STE10/100A driver can use this R/W area
0
R/W
as user-specified storage.
7~0
--- Reserved
CR32 (offset = 80h), SIG - Signature of STE10/100A
35/82
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