STLC1502 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'STLC1502' PDF : 81 Pages View PDF
STLC1502
7.1 Timer
The Timer module connects to the Advanced Peripheral Bus.
CKTIMER
PWRITE
PENABLE
Prescaler
BnRES
DSEL_TIMER
Load Registers
PA[15:0]
PRDATA [15:0]
PWDATA [15:0]
To PIC
INTCT1
INTCT2
INTCT3
Control Registers
Control Logic
To EDM INTCT4
Control Section
FRC - Free Running
counter
FRC - Free Running
counter
Timer Section
Figure 9: Timer block diagram
This implementation consists of two major sections comprising:
• All the control logic
• Two instantiations of the free-running counters (FRCs)
The timer module has a series of memory-mapped locations that allow the state of the timer module to be read
from and written to via the APB.
7.1.1 Timer introduction
Two timers are defined and can be selected by the Control register:
• Free-running mode:The timer wraps after reaching its zero value, and continues to count down from
the maximum value.
• Periodic timer mode:The counter generates an interrupt at a constant interval.
7.1.2 Timer operation
The timer is loaded by writing to the load register and, if enabled, counts down to zero. When zero is reached,
an interrupt is generated. The interrupt may be cleared by writing to the Clear register.
After reaching a zero count, if the timer is operating in free-running mode it continues to decrement from its max-
imum value. If periodic timer mode is selected, the timer reloads from the load register and continues to decre-
ment. In this mode the timer effectively generates a periodic interrupt. The mode is selected by a bit in the
Control register.
At any point, the current timer value may be read from the Value register.
The timer is enabled by a bit in the control register. At reset, the timer is disabled, the interrupt is cleared and
the Load register is undefined. The mode and prescale values are also undefined.
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