STLC1502 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'STLC1502' PDF : 81 Pages View PDF
STLC1502
9.0 D950 Domain
The D950 domain consists of a D950 core, I RAM, I ROM, X RAM, Y RAM, Timer, Emulator, Interrupt controller
and TAP, PCM interface peripherals.
9.0 D950 memory map
The following table provides the memory map of D950 on X, Y, I buses.
Address
0x0000
---------
0x000F
0x0010
-------
0x001F
0x0020
-------
0x002F
0x0030
-------
0x005F
0x0060
-------
0x006F
0x0070
-------
0xFFFF
Area name
DSP registers
EMU
ITC
Reserved DSP
TIM
RAM Y
Mapping of D950 Y memory space (1 Word = 16 bit)
Area size
16 Words
16 Words
16 Words
16 Words
64 KWords
64/81
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