STLC2411 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'STLC2411' PDF : 25 Pages View PDF
STLC2411
7 GENERAL SPECIFICATION
7.1 SYSTEM CLOCK
The STLC2411 works with a single clock provided on the XIN pin. The value of this external clock should
be any integer value from 12 … 33 MHz ±20ppm (overall).
7.1.1 SLOW CLOCK
The slow clock is used by the baseband as reference clock during the low power modes. The slow clock
requires an accuracy of ±250ppm (overall).
Several options are foreseen in order to adjust the STLC2411 behaviour according to the features of the
radio used:
– If the system clock (e.g. 13MHz) is not provided at all times (power consumption saving) and no slow
clock is provided by the system, a 32 kHz crystal must be used by the STLC2411 (default mode).
– If the system clock (e.g. 13MHz) is not provided at all times (power consumption saving) and the system
provides a slow clock at 32kHz or 3.2kHz, this signal is simply connected to the STLC2411 (lpo_clk_p).
– If the system clock (e.g. 13MHz) is provided at all times, the STLC2411 generates from the reference
clock an internal 32kHz clock. This mode is not an optimized mode for power consumption.
7.2 BOOT PROCEDURE
The boot code instructions are the first that ARM7TDMI executes after a HW reset. All the internal device's
registers are set to their default value.
There are 2 types of boot:
– External memory boot.
When boot pin is set to `1` (connected to VDD), the STLC2411 boots on its external memory
– UART download boot from ROM.
When boot pin is set to `0` (connected to GND), the STLC2411 boots on its internal ROM (needed to
download the new firmware in the external memory).
When booting on the internal ROM, the STLC2411 will monitor the UART interface for approximately 1.4
second. If there is no request for code downloading during this period, the ROM jumps to external memory.
7.3 CLOCK DETECTION
The STLC2411 has an automatic slow clock frequency detection (32kHz, 3.2kHz or none).
7.4 MASTER RESET
When the device's reset is held active (nreset is low), uart1_txd and uart2_txd are set to input state. When
the nreset returns high, the device starts to boot.
Remark: The device should be held in active reset for minimum 20ms in order to guarantee a complete
reset of the device.
7.5 INTERRUPTS/WAKE-UP
All GPIOs can be used both as external interrupt source and as wake-up source. In addition, the chip can
be woken-up by USB, uart1_rxd, uart2_rxd, int1, int2.
7.6 V1.2 detailed functionality - Extended SCO
User Perspective - Extended SCO
This function gives improved voice quality since it enables the possibility to retransmit lost or corrupted
voice packets in both directions.
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