STLC2500A View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'STLC2500A' PDF : 37 Pages View PDF
General specification
STLC2500A
Note:
i.e. GPIO3 is low) it sets HOST_WAKEUP to '0', telling the Host that the system
clock is not needed any more.
Note that in this case, the UART will be closed (as described above).
– An autonomous wakeup (i.e. initiated by the Bluetooth Controller) goes as follows:
the Bluetooth Controller sets the HOST_WAKEUP signal to '1' to request the
system clock. Initially, GPIO3 is unaffected. GPIO3 will only be asserted when and
if there are data or HCI events to be sent. In that case the UART will be opened
(and UART_RTS will be asserted).
– Wakeup initiated by the Host:
the Hosts sets BT_WAKEUP to '1'. The Bluetooth Controller then asserts the
HOST_WAKEUP signal to request the system clock. The Bluetooth Controller will
also open the UART (and assert UART_RTS). Initially, GPIO3 is unaffected.
GPIO3 will only be asserted when and if there are data or HCI events to be sent.
Figure 6. Low power modes [Initiated deep sleep, mode 2]
Active
BB
Sleep Mode
UART on UART off
Host: BT_WAKEUP=‘0’
AND
BT Controller: HOST_WAKEUP=‘0’
and GPIO3=‘0’
Host: BT_WAKEUP=‘1’
OR
Hard Reset
Host: BT_WAKEUP=‘1’
OR
BT Controller: HOST_WAKEUP=‘1’
and GGPPIIOO33==‘‘11’’ or GGPPIIOO33==‘‘00’’
Host: sends a specific HCI command.
Deep Sleep
Mode
UART off
Complete Power Down
6.9
Patch RAM
The STLC2500A includes a HW block that allows patching of the ROM code.
Additionally, a SW patch mechanism allows replacing complete SW functions without
changing the ROM image.
A part of the RAM memory is used for HW and SW patches.
6.10
Download of SW parameters
To change the device configuration a set of customizable parameters have been defined
and put together in one file. This file is downloaded at start-up into the STLC2500A.
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