STLC90114 - STLC90115
3 GENERAL BLOCK DIAGRAM
An on-board-controller platform has complete control over the configuration. Figure 1 shows a typical con-
figuration. This on-board-controller platform also contains the Flash with the VDSL software.
Figure 1. A typical configuration of an on-board controller platform.
On board Controller
Platform
Flash
contain ing Flash
Sdram
CtrlE ARM
ATM
Processor
STLC90115
VDSL Modem IP
STLC90114
To/From Backpannel
To/From VDSL
The STLC90115 includes an internal ARM processor core connected to an external SDRAM. The boot
process will be under control of the external OBC who will use the code from its Flash to initialize the
SDRAM.
s ATM interface: Utopia "level 2" interface is integrated with the STLC90115 interface
s Flash memory: interfaces to an external flash memory.
s SDRAM controller: interfaces to an external SDRAM memory.
s General Purpose I/O (GPIO): ports that can be driven or read by the OBC
4 THE ZIPPERWIRE VDSL MODEM CHIPSET
ZipperWire is a two-chip VDSL Modem Transceiver with embedded transceiver controller. The kit also in-
cludes the necessary modem firmware running on the Transceiver Controller. The chipset directly inter-
faces with ATM systems to allow ATM traffic to be transported at high speed on copper pairs with minimum
overhead.
4.1 The Modem Environment
The same chipset is used at both sides of the link. An external VDSL-compatible line driver is used to drive
the twisted pair. Finally, a splitter* is needed to split the base band signal from the modulated VDSL signal.
4.2 The Chipset Functions
The chip functions are depicted in the block diagram of the VDSL modem presented in Fig. 1 The functions
included in each IC are as follows:
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