STM32F373xx
Electrical characteristics
Figure 12. High-speed external clock source AC timing diagram
9+6(+
9+6(/
WU+6(
WZ+6(+
WI+6(
7+6(
WZ+6(/
W
069
Low-speed external user clock generated from an external source
In bypass mode the LSE oscillator is switched off and the input pin is a standard GPIO.
The external clock signal has to respect the I/O characteristics in Section 6.3.14. However,
the recommended clock input waveform is shown in Figure 13.
Symbol
Table 39. Low-speed external user clock characteristics
Parameter(1)
Conditions
Min
Typ
Max Unit
fLSE_ext
User External clock source
frequency
VLSEH
OSC32_IN input pin high level
voltage
VLSEL
OSC32_IN input pin low level
voltage
tw(LSEH)
tw(LSEL)
tr(LSE)
tf(LSE)
OSC32_IN high or low time
OSC32_IN rise or fall time
1. Guaranteed by design.
-
-
32.768 1000 kHz
-
0.7VDD
-
VDD
V
-
VSS
-
0.3VDD
-
450
-
-
ns
-
-
-
50
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