STM32F373C8 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
STM32F373C8
STMicroelectronics
'STM32F373C8' PDF : 131 Pages View PDF
STM32F373xx
Electrical characteristics
Note:
Output voltage levels
Unless otherwise specified, the parameters given in Table 53 are derived from tests
performed under ambient temperature and VDD supply voltage conditions summarized in
Table 22. All I/Os are CMOS and TTL compliant (FT, TTa or TC unless otherwise specified).
Table 53. Output voltage characteristics (1)
Symbol
Parameter
Conditions
Min Max Unit
VOL(2) Output low level voltage for an I/O pin
VOH(4) Output high level voltage for an I/O pin
VOL(2) Output low level voltage for an I/O pin
VOH (4) Output high level voltage for an I/O pin
VOL(2)(5)
VOH(4)(5)
VOL(2)(5)
VOH(4)(5)
Output low level voltage for an I/O pin
Output high level voltage for an I/O pin
Output low level voltage for an I/O pin
Output high level voltage for an I/O pin
CMOS port(3)
-
0.4
IIO = +8 mA
2.7 V < VDD < 3.6 V
VDD–0.4
-
TTL port(3)
-
0.4
IIO = +8 mA
2.7 V < VDD < 3.6 V
2.4
-
IIO = +20 mA
-
1.3 V
2.7 V < VDD < 3.6 V VDD–1.3 -
IIO = +6 mA
-
0.4
2 V < VDD < 2.7 V VDD–0.4 -
VOLFM+(2)
Output low level voltage for a FTf I/O pins
in FM+ mode
IIO = +20 mA
2.7 V < VDD < 3.6 V
-
0.4
1. VDDSD12 is the external power supply for PB2, PB10, and PE7 to PE15 I/O pins (the I/O ground pin is
internally connected to VSS). VDDSD3 is the external power supply for PB14 to PB15 and PD8 to PD15
I/O pins (the I/O ground pin is internally connected to VSS).
table are related to their given VDDSDx power supply.
For
those
pins
all
VDD
supply
references
in
this
2.
The
and
tIhIOecsuurmrenotf
sunk by the device must always respect
IIO (I/O ports and control pins) must not
the absolute maximum
exceed IVSS.
rating
specified
in
Table
20
3. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.
4.
TTahbeleIIO20cuarnredntthseosuurcmedofbIyIOth(Ie/Odepvoirctes
must always respect the absolute maximum
and control pins) must not exceed IVDD.
rating
specified
in
5. Guaranteed by design.
I/O pins are powered from VDD voltage except pins which can be used as SDADC inputs:
- The PB2, PB10 and PE7 to PE15 I/O pins are powered from VDDSD12.
- PB14 to PB15 and PD8 to PD15 I/O pins are powered from VDDSD3. All I/O pin ground is
internally connected to VSS.
VDD mentioned in the Table 53 represents power voltage for a given I/O pin (VDD or
VDDSD12 or VDDSD3).
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