STV0684
Electrical Characteristics
4.5.4 SDRAM timing description
4.5.4.1 Read/Write timing diagrams for external synchronous DRAM
Figure 5: SDRAM read timing
tCK
tCL
tCH
DCLK
CKE
Command
(RAS, CAS,
WE)
A0-9, BA,
A11-12
A10
DQM
tCMS tCMH
ACTIVE
READ
ROW
ROW
tAS
tAH
tCMS
NOP
COLUMN
PRECHARGE NOP
tAC
tOH
tCMH
DQ
DOUT M DOUT M + 1 DOUT M + 2 DOUT M + 3
tRCD
CAS Latency
tRC
tRAS
tRP
DQ sample DQ sample DQ sample DQ sample
Figure 6: SDRAM write timing
tCK
tCL
tCH
DCLK
CKE
Command
(RAS, CAS,
WE)
A0-9,
A11-12
A10
DQM
tCMS tCMH
ACTIVE
WRITE
ROW
ROW
tAS
tAH
tCMS
NOP
COLUMN
PRECHARGE NOP
tDS
tDH
tCMH
DQ
DIN M
DIN M + 1
DIN M + 2
DIN M + 3
tRCD
tRC
tRAS
tRP
SDRAM Write Timing
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