SX1276/77/78/79
WIRELESS, SENSING & TIMING
DATASHEET
6.2. FSK/OOK Mode Register Map
This section details the SX1276/77/78/79 register mapping and the precise contents of each register in FSK/OOK mode.
Convention: r: read, w: write, t:trigger, c: clear
Table 42 Register Map
Name
(Address)
Bits
Variable Name
Mode
Default
value
FSK/OOK Description
RegFifo
(0x00)
7-0
Fifo
rw 0x00 FIFO data input/output
Registers for Common settings
7
LongRangeMode
0 FSK/OOK Mode
r
0x00 1 LoRaTM Mode
This bit can be modified only in Sleep mode. A write operation on
other device modes is ignored.
6-5
ModulationType
Modulation scheme:
rw
0x00
00 FSK
01 OOK
10 11 reserved
RegOpMode
(0x01)
4
reserved
r
0x0 reserved
Access Low Frequency Mode registers (from address 0x61 on)
3
LowFrequencyModeOn
rw 0x01 0 High Frequency Mode (access to HF test registers)
1 Low Frequency Mode (access to LF test registers)
2-0
Mode
Transceiver modes
000 Sleep mode
001 Stdby mode
010 FS mode TX (FSTx)
rw 0x01 011 Transmitter mode (Tx)
100 FS mode RX (FSRx)
101 Receiver mode (Rx)
110 reserved
111 reserved
RegBitrateMsb
(0x02)
7-0
BitRate(15:8)
rw 0x1a MSB of Bit Rate (chip rate if Manchester encoding is enabled)
RegBitrateLsb
(0x03)
7-0
BitRate(7:0)
LSB of bit rate (chip rate if Manchester encoding is enabled)
rw 0x0b
BitRate = B----i---t--R----a---t--e---(--1---5-F--,--0X---)-O--+---S---B--C------i----t----r-----a----1---t---6-e------F--------r-----a-------c--
Default value: 4.8 kb/s
RegFdevMsb
7-6
(0x04)
5-0
reserved
Fdev(13:8)
rw 0x00 reserved
rw 0x00 MSB of the frequency deviation
RegFdevLsb
(0x05)
7-0
Fdev(7:0)
LSB of the frequency deviation
rw 0x52 Fdev = Fstep × Fdev(15,0)
Default value: 5 kHz
Rev. 4 - March 2015
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