SX8801IRXXMLTRT View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'SX8801IRXXMLTRT' PDF : 135 Pages View PDF
XE8801A – SX8801R
9.1 Features
The XE8801AM and SX8801R chips support 8 event sources, divided into 2 levels of priority.
9.2 Overview
A CPU event is generated and memorized when an event source becomes active. The 8 event sources are divided
into 2 levels of priority: High (4 event sources) and Low (4 event sources). Those 2 levels of priority are directly
mapped to those supported by the CoolRisc (EV0 and EV1; see CoolRisc documentation for more information).
RegEvn is an 8-bit register containing flags for the event sources. Those flags are set when the event is enabled
(i.e. if the corresponding bit in the registers RegEvnEn is set) and a rising edge is detected on the corresponding
event source.
Once memorized, writing a ‘1’ in the corresponding bit of RegEvn clears an event flag. Writing a ‘0’ does not
modify the flag. All interrupts are automatically cleared after a reset.
Two registers are provided to facilitate the writing of event service software. RegEvnPriority contains the number
of the highest priority event set (its value is 0xFF when no event is set). RegEvnEvn indicates the priority level of
the current interrupts. RegEvnEvn and RegEvnPriority ‘s values are dependent upon the memorized state of the
events (as reflected in flags in RegEvn).
9.3 Register map
pos.
RegEvn
7
RegEvn[7]
6
RegEvn[6]
5
RegEvn[5]
4
RegEvn[4]
3
RegEvn[3]
2
RegEvn[2]
1
RegEvn[1]
0
RegEvn[0]
rw
reset
function
r 0 resetsystem event #7 (high priority)
c1
clear event #7 when written 1
r 0 resetsystem event #6 (high priority)
c1
clear event #6 when written 1
r 0 resetsystem event #5 (high priority)
c1
clear event #5 when written 1
r 0 resetsystem event #4 (high priority)
c1
clear event #4 when written 1
r 0 resetsystem event #3 (low priority)
c1
clear event #3 when written 1
r 0 resetsystem event #2 (low priority)
c1
clear event #2 when written 1
r 0 resetsystem event #1 (low priority)
c1
clear event #1 when written 1
r 0 resetsystem event #0 (low priority)
c1
clear event #0 when written 1
Table 9-1: RegEvn
© Semtech 2005
www.semtech.com
9-2
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