SX8801R View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'SX8801R' PDF : 135 Pages View PDF
XE8801A – SX8801R
The counters/timers/PWM can take its clocks from internal or external sources (on Port A) and can generate
interrupts or events. The PWM is output on Port B.
The VLD (voltage level detector) detects the battery end of life with respect to a programmable threshold.
VPP/TEST
INSTRUCTION MEMORY
DATA
MEMORY
VBAT
VSS
RESET
OSCIN
OSCOUT
VREG
PB(7:0)
CPU
B
COOLRISC816
U
S
C
O
N
T
R
O
L
L
8X8 MULTIPLIER
E
R
16 CPU REGISTERS
RESET BLOCK
WD POR
RC
XTAL
VREG
CLOCK
GENERATION/
POWER
MANAGEMENT
TEST CONTROLLER
8 DATA REGISTERS
IRQ HANDLING
EVN HANDLING
PORT B
address
control
datain
dataout
reset
control
clocks
test
control
irq
evn
PORT A
PORT C
ACQUISITION
CHAIN
ZoomingADC
VMULT
USRT
UART
COUNTERS
TIMERS
PWM
PA(7:0)
PC(7:0)
AC_R(3:0)
AC_A(7:0)
VMULT
VLD
Figure 1-1. Block schematic of the XE8801A circuit.
© Semtech 2005
www.semtech.com
1-3
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