T89C51AC2-RLTIM View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'T89C51AC2-RLTIM' PDF : 121 Pages View PDF
FM0 Memory Architecture
The Flash memory is made up of 4 blocks (see Figure 20):
• The memory array (user space) 32 KB
• The Extra Row
• The Hardware security bits
• The column latch registers
User Space
This space is composed of a 32 KB Flash memory organized in 256 pages of 128 Bytes.
It contains the user’s application code.
Extra Row (XRow)
This row is a part of FM0 and has a size of 128 Bytes. The extra row may contain infor-
mation for boot loader usage.
Hardware Security Byte
The Hardware security Byte space is a part of FM0 and has a size of 1 byte.
The 4 MSB can be read/written by software, the 4 LSB can only be read by software and
written by hardware in parallel mode.
Column Latches
The column latches, also part of FM0, have a size of full page (128 Bytes).
The column latches are the entrance buffers of the three previous memory locations
(user array, XROW and Hardware security byte).
Cross Flash Memory Access
Description
The FM0 memory can be program only from FM1. Programming FM0 from FM0 or from
external memory is impossible.
The FM1 memory can be program only by parallel programming.
The Table 23 show all software Flash access allowed.
Table 23. Cross Flash Memory Access
FM0
(user Flash)
FM1
(boot Flash)
External
memory
EA = 0
Action
Read
Load column latch
Write
Read
Load column latch
Write
Read
Load column latch
Write
FM0
(user Flash)
ok
ok
-
ok
ok
ok
-
-
-
FM1
(boot Flash)
-
-
-
ok
-
-
-
-
-
36 A/T89C51AC2
4127H–8051–02/08
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