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TDA9105 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
TDA9105
ST-Microelectronics
STMicroelectronics ST-Microelectronics
'TDA9105' PDF : 32 Pages View PDF
OPERATING DESCRIPTION (continued)
Moire Function
Figure 18 : Moire Function Block Diagram
H-S YNC
Ck
Q
D Rst Q
TDA9105
23
V-S YNC
Monosta ble
Ck
Q
D
Q
Figure 19 : Moire Output Waveform
EVEN FRAME
H
V
MOIRE
ODD FRAME
H
V
MOIRE
Geometric Corrections
The principle is represented in Figure 20.
Starting from the vertical ramp, a parabola shaped
is generatedfor E/Wcorrection, dynamic horizontal
phase control correction, and vertical dynamic Fo-
cus correction.
The core of the parabola generator is an analog
multiplier. The output current of which is equal to :
I = k (VRAMP - VDCIN)2.
Where VRAMP is the vertical ramp, typically com-
prised between 2 and 5V, VDCIN is a vertical DC
input adjustable in the range 3.2V 3.8V in order
to generate a dissymmetric parabola if required
(keystone adjustment).
In order to keep good screen geometry for any end
user preferences adjustment we implemented the
possibility to have ”geometry tracking”. To enable
the ”tracking” function, the VDCOUT must be con-
nected to VDCIN.
It is possible to inhibit VPOS tracking by applying a
fixed DC voltage on the VDCIN Pin.
This DC voltage in that case must be taken from
the vertical reference and adjusted to 3.5V with an
external bridge resistor.
Due to large output stages voltage range (E/W,
BALANCE, FOCUS), the combination of tracking
function with maximum vertical amplitude max. or
min. vertical position and maximum gain on the DC
control inputs may leads to the output stages satu-
ration. This must be avoided by limiting the output
voltage by apropriate DC control voltages.
19/32
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