TDA9105A View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'TDA9105A' PDF : 31 Pages View PDF
TDA9105A
OPERATING DESCRIPTION (continued)
PLL2
Figure 16 : PLL2 Timing Diagram
H Osc
Sawtooth 0.75T
0.25T
6.4V
4V
1.6V
Flyback
Internally
Shaped Flyback
H Drive
Ts
Duty Cycle
The duty cycle of H-drive is adjustable between 30% and 50%.
Figure 18 : Dual PLL Block Diagram
C Lockdet HLOCKOUT
13
2
The PLL2 ensures a constant position of the
shaped flyback signal in comparison with the saw-
tooth of the VCO (see Figure 13).
The phase comparator of PLL2 is followed by a
charge pump with a ±0.5mA (typ.) output current.
Theflyback input is composedof an NPNtransistor.
This input has to be current driven.
The maximum recommanded input current is 2mA
(see Figures 14 and 15).
Figure 17 : Flyback Input Electrical Diagram
HFLY 5
400Ω
Q1
20kΩ
GND 0V
PLL1INHIB Filter R0 C0
14
12 11 10
Horizontal
Input
17
LOCKDET
INPUT
INTERFACE
High
COMP1
E2
Low
CHARGE
PUMP
PLL
INHIBITION
Horizontal
Adjust
15
Adjust
Rapcyc
4
RAP
CYC
Cap
PHi2
3
High
CHARGE
PUMP
Low
PHASE
ADJUST
4V
COMP2
EN
VA
VB
VCO
OSC
3.2V
FLYBACK 5 Flyback
PWM
LOGI
PWM
21 SortCOLL
BUFFER
20 SortEM
17/31
Share Link: 
