TDA9106
OPERATING DESCRIPTION (continued)
III.2 - EW
EWOUT = 2.5V + K1 (VOUT - VDCOUT)2
+ K2 (VOUT - VDCOUT)
+ K3 (VOUT - VDCOUT)2 |VOSC - VMID|
+ K4 (VOUT - VDCOUT) |VOSC - VMID|
VOSC is the ramp Pin 27 and VMID the middle of it,
typically 3.5V
K1 is adjustable by EW amplitude I2C register
K2 is adjustable by Keystone I2C register
K3 is adjustable by Cbow Corner I2C register
K4 is adjustable by Spin Corner I2C register
III.3 - Dynamic Horizontal Phase Control
IOUT = K5 (VOUT - VDCOUT)2 + K6 (VOUT - VDCOUT)
K5 is adjustable by SidePin Balance I2C register
K6 is adjustable by Parallelogram I2C register
Figure 22 : Vertical Part Block Diagram
III.4 - Vertical Dynamic Focus
VFOCOUT = 6V - 0.7 (VOUT - VDCOUT)2
No adjustment is available for this part except by
means of tracking.
III.5 - Vertical Sawtooth Generator
The vertical part generates a fixed amplitude ramp
which can be affectedby S and C correctionshape.
Then, the amplitudeof this ramp is adjustedto drive
an external power stage (see Figure 22).
The internal reference voltage used for the vertical
part is available between Pin 26 and Pin 24. Its
typical value is :
V26 = VREF = 8V
The charge of the external capacitor on Pin 27
(VCAP) generates a fixed amplituderamp between
the internal voltages, Vl (Vl = VREF/4) and VH (VH =
5/8 x VREF).
CHARGE CURRENT
TRANSCONDUCTANCE
AMPLIFIER
S/G 1
VSYNCIN 33
H/HVIN 38
SYNC
PROCESSOR
POLARITY
DISCH.
OSCILLATOR
27
OSC
CAP
Corner Corner Balance
SUB0B/6bits SUB0C/6bits
CORNER
REF
25
SAMPLING
SAMP.
CAP
Vlow
Sawth.
Disch.
S CORRECTION
VS_AMP
SUB07/6bits
COR_C
SUB08/6bits
C CORRECTION
29 VERT_OUT
VERT_AMP
SUB05/7bits
PARABOLA
GENERATOR
31 EW_OUT
EW_CENT EW_AMP
SUB0A/6bitsSUB09/6bits
SPB_OUT
PARAL
SPB_AMP
SUB0E/6bits SUB0D/6bits
Internal Signal to PLL2
32 V_FOCUS
25/30